The present invention pertains to high speed data transfer among processors and more particularly to efficient routing, buffering, and storing the data packets by buffer managers.
In modern communication systems, it is required that large amounts of data be transferred from one point to another. These switch points are often computer controlled switching arrangements. Computers can communicate with one another to affect the data transfer from one computer to another. Both computers would be required to effectively dedicate one hundred percent of their real time to affect the transfer. This is ineffective utilization of the computer's processing time since computers are able to transfer data much faster than in a simple data transfer between central processing units.
As a result of having two dedicated processors communicating with one another in real time, other approaches have been utilized to make more efficient use of the processor's real time. Such schemes include direct memory access (DMA) in which one processor directly accesses the memory of another processor and transfers data to the memory suitable for the first processor to directly utilize. While this scheme works well for a few processors communicating with one another, it does not work well for transferring large amounts of data from one processor to another as is done in modern telecommunication systems.
To overcome the problem of the number of processors sending and receiving data in a telecommunication system, for example, packet switching has been adopted. In such switching arrangements, processors send fixed or variable length packets of data smaller than the total amount of data required to be sent back and forth in bursts among the processors. Typically each such packet has a header with information for routing the packet to the appropriate processor. Processors typically monitor the headers to determine which packets are addressed to them and store the appropriate packet data in memory. The problem with this arrangement is that the processor must still monitor on the communication path and examine all packets for a particular address and then provide the ability to store the data into the processor's local memory. As a result, the processor must waste considerable time reading each header and transferring the appropriate packets into its memory. In addition due to the varying kinds of functions to be performed by telecommunication system processors, it is highly desirable to place certain packets of data in certain areas of local memory.
Accordingly, it would be highly desirable for a multiprocessor arrangement to provide a common scheme of buffer management among processors so that data packets may be transferred rapidly and with as little intervention of the processor from a processor to predefined locations of other processor's local memory.